机读格式显示(MARC)

• 000 01225cam 2200325 a 4500

• 000 1000110345

• 001 0000332565

• 005 20100629104418.0

• 008 100422r20102011cc a b 001 0 eng d

• 020 __ |a 9787121104770 (pbk.) : |c CNY98.00

• 040 __ |a RUC |c RUC

• 041 0_ |a eng |b chi

• 090 __ |a TP312/CMD/(2)

• 093 __ |a TP312 |2 4

• 099 __ |a CAL 022010067287

• 100 1_ |a Ciletti, Michael D.

• 245 10 |a Advanced digital design with the Verilog HDL = |b Verilog HDL高级数字设计 / |c Michael D. Ciletti著.

• 246 31 |a Verilog HDL高级数字设计

• 250 __ |a 2nd ed.

• 260 __ |a Beijing : |b Publishing House of Electronics Industry, |c 2010.

• 300 __ |a 26, 965 p. : |b ill. ; |c 24 cm.

• 490 0_ |a 国外电子与通信教材系列

• 504 __ |a Includes bibliographical references and index.

• 534 __ |p Reprint. Originally published: |c Upper Saddle River, N.J. : Pearson Education, c2011. |z 9780136019282 (alk. paper).

• 650 _0 |a Logic design |x Data processing.

• 650 _0 |a Verilog (Computer hardware description language)

• 901 __022010001556

• 905 __ |a CAU |f TP312/CMD/(2) |b W0084256

• 907 __ |a CAU |f TP312/CMD/(2) |b W0084256

• 999 __ |t C |A xy1 |a 20100628 13:46:29 |I xy1 |i 20100629 10:44:18 |G xy1 |g 20100630 09:54:0